Hi xcuresme,
The main reason for the layout of this eval board is that the inputs of the AD822x instrumentation amplifiers have very high impedance. Because of this, there is (ideally) no current flowing in the inputs and therefore there is no magnetic field generated... resulting in no interference between the two input lines. As a general rule, high impedance nodes are more susceptible to parasitic capacitance, while low impedance nodes are more susceptible to parasitic inductance. Because of this, the best option for laying out the evaluation board is to remove the ground plane beneath the input traces so as to minimize capacitance. Note that keeping the ground plane would result to lower inductance.
It is still a good idea to use twisted pairs to interface input signals to avoid picking up too much environmental noise. This is the same reason that the input traces are usually kept short. You could read more about these concepts in AN-346 and AN-347.
I hope this helps!
Kris