Hi, Prashant:
Sorry I'm a little bit confused of your comment:
The sampling freq is programmable depending on ADCC events and Trigger configuration. The maximum can be 50M/19 = 2.631MSPS ...(or 2 * 2.631MSPS when both ADCs are sampled simultaneously).
As my understanding: the time of each ADC sampling event has 3 phases, each of the phase will take numbers of clks to finished, let's say to total time should be 3*380ns = 1140ns:
- Send control word
- Conversion
- Retrieve the ADC data back
So the 380ns (160ns acquisition + 220ns conversion) should belonged to the second phase: Conversion, right?
But in order to get the maxium sampling rate, you proposed the tightly pipeline mode of ADC, but need to use both ADCs in CM40x to achive that.
I'm not quite understand how to achive the "2 * 2.631MSPS when both ADCs are sampled simultaneously".
Best Regards
Kelven