Hi Sittie,
Thank you for the reply.
Please accept my apology. I have failed to state my question clearly.
I have two AD9910 chips that need to be controlled by one microcontroller. I am not concerned about synchronizing the two DDS chips.
Sometimes I need to send commands to DDS 1 and other times I need to send commands to DDS 2. I can clearly do this by dedicating a serial port, chip select and IO update line to each DDS. This of course makes them independent and works just fine.
My question is, how many control lines can be shared by the two DDS chips? Certainly each chip needs it's own chip select. However the two chips can share the serial data clock and serial data line. This is possible because these serial communication lines are enabled by chip select. That is to say, the DDS chip ignores these lines unless chip select is asserted.
So my question is, does the DDS also ignore IO Update when chip select is not asserted?
This is what I meant by the word "gated". Sorry for being cryptic.
My concern is this. If the DDS is always responding to rising edges on IO Update even while chip select is not asserted, it will be transferring old data from the buffer registers to the active registers.
In summary, do I need to run a dedicated IO Update line to each DDS?
Again, I do not care a bit about synchronizing the two DDS chips.
Thanks for the load current specs for the IO Update line.
Cheers,
David