Thanks for the info Larry,
100MHz is simply a target for my system, as I may not be able to provide fast enough response for the rest of my circuit anyways, depending on which loads i need to drive. I am more concerned about DAC resolution, frequency resolution, and jitter/spurious free behavior. I'm trying to avoid bridging 3 AD9952 together. I understand using a single AD9959 might be more friendly to use and would be driveable direclty by an FPGA with a microprocessor and a oscillator (typically 50MHz) if i get an internal PPL in the DDS.
As a matter of fact, i'm simply concerned about the DAC resolution of 10bits. does this constraint really matters for generating square wave signals or is it more relevant for sines, etc..
Tank you