After looking at the datasheets for the CS4385 and the CS5368, I agree that TDM mode is the way to go for this.
On the 5368 A/D side, the connections are SDOUT1->SPORT_D0, MCLK<->SPORT_CLK, and LRCK<-SPORT_FS.
On the 4385 D/A side, the clock and frame sync connections are the same, and the data connection is SDIN1<-SPORT_D0.
With the half-SPORTs, you have the ability to internally connect clocks and frame syncs between SPORT halves to synchronize them, and this would be controlled via software by writing to the SPORT_CTL2_A or SPORT_CTL2_B register, as described in the Multiplexer Logic section of the SPORT chapter on pages 26-13 through 26-15 of the HRM:
http://www.analog.com/static/imported-files/processor_manuals/blackfin_hwr_bf60x_rev0.5.pdf
In your case, the clock will be setup as external for both the A and B halves of the SPORT, but only ONE of them will be set up to take the clock from the other SPORT half (the other will be taking it from your external clock source). Meanwhile, the frame sync will be internally generated on one of these SPORT halves while the other has the FS configured as external and coming from the half-SPORT that is generating the FS. For example:
HSPORT A - internal FS, external clock, FSMUXSEL = CKMUXSEL = 0
HSPORT B - external FS, external clock, FSMUXSEL = CKMUXSEL = 1
Finally, the ATDV signal is only required if the receiving device needs any sort of gating signal for data to be received. If, for example, the receiving device was a SPI device, the ATDV could be used as that SPI port's slave-select input. It does not appear to be required for the components you've selected.
