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Re: New JTAG Connections (10 pin)

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Hi,

I share your interest and can't answer your questions with any authority. However I did get this reply from ADI regarding the pinout of the new 10-pin connector:

"Please be aware the J2 pinout listed in the manual has the columns swapped."

So, I thought I should warn you...

I was interested as to the 2 new pins in this connector when comparing it the old 14-pin connector.

I wrote to them (to processor.tools.support@analog.com) asking about the signals in pins 2 and 9 (PD and TARGET_RESET#). I suggest you write to them with your questions as well and maybe post the reply here later.

This is their full answer:

 

"Please be aware the J2 pinout listed in the manual has the
columns swapped.  The two pins in question are PD on pin 1 and
~TARGET_RESET on pin 10.

PD is a power detect signal and signifies to the emulator
that the target has power.  Please connect the target board’s power rail
that is connected to the processors VDD external (VDD_EXT in some cases) .

~TARGET_RESET is an output of the emulator that can be used
by custom designs to reset circuitry on the target board.  This is an
input to target boards and can be used to reset the processor and other
peripherals.  The signal is active low and is controlled by the CCES GUI.

Regards,                            

Processor Tools Support"

 

Good luck,

Kempler Itamar.


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