Re: ad-fmcomms5-ebz
What is the current status? The board seems to be sort-of available (there is a price, I can order one but it looks like it will be on backorder and I don't see an indication of the expected delivery...
View ArticleAD9361 VDD_INTERFACE
Hi, I wish to know that the How the VDD_Interface voltage level will affect RX/TX DATA & Controls, SPI lines voltage levels?If i connect the interface to LVDS 2.5 V , will all data lines, controls...
View ArticleRe: AD9739A Native FMC Reference Design for DOCSIS
All of the necessary files to get the card running are on the site and available for download. There are no vector generation files, however. You'll need to generate those yourself. I don't believe we...
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Re: AD9739A-FMC-EBZ vs. AD9739A FMC Card (Didilent)
All of the information on the AD9739A FMC board can be found here: AD9739A Native FMC Card / Xilinx Reference Designs [Analog Devices Wiki] I'm not sure if this board is the same as shown by Digilent...
View ArticleRe: Parallel DAC with High Voltage Output (+18V)
Thank you Mark. I haven't found any other way to give negative reference as Vref so I am fine with the inverting opamp method. I still have some doubts. I need to generate Vout from 0 to +Vref (+18V),...
View ArticleBF/VDK - Changing stack pointer on ISR entry
Hi, I have a multi-threaded VDK project in C running on a BF518 platform. Each thread has its own stack space on the heap memory (placed into SDRAM). This stack space is also used by the interrupt...
View ArticleRe: Debug data on DAC is not same as debug data on ADC?
Hi Mohd, There are many factors that change the signal as it goes from the DAC to the RF back to the ADC. So if you need to get the same digital signal back there are a lot of signal manipulation and...
View ArticleRe: AD9625 + HSC-ADC-EVALEZ
Hi Ian, Thank you for the email. Can we continue our discussion on the FPGA HDL code offline? Thanks!Rosanah
View ArticleADF4360-9 Minimum components needed when not using RFout A or B
We are using the ADF4360-9 in an application that only uses the DIVOUT signal and does not make use of the RF output pins A&B. Can these pins be left unconnected? If not, what are the minimum...
View ArticleRe: AD5700 Carrier Detect Off Timing issue
Hi, The figure you're pointing out is the end of the HART communication which is the period between the valid carrier being present and the CD pin being disasserted. The HART specifications allow a...
View ArticleRe: ADM7170, ADM7171, ADM7172 soft start
Luca, The SS pin was never intended to work this way so we'd have to test it in the lab to see what happens. Here's a brief explanation of how the SS pin works... The SS cap does not bypass the...
View ArticleRe: ADF4351 PLL programming question
Yes, they said they provide support only for using complete USRP software defined radio kit. I am only using their transceiver. That board has 2 PLLs and both show same error so I think I am missing...
View ArticleRe: AD9625 Noise Figure and IIP3 values and calculations?
After looking through some of my research on this topic some more, I recall another method of calculating the ADC dBm input level at 0dBFS. The formula is generically "Full Scale Signal Power Level...
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Re: ADF4351 PLL programming question
Can you check the voltage level on the CE and PDBrf pins? Both pins should be logic high. If that doesn't work, use the USRP software to monitor the SPI signals. Note what register values are being...
View ArticleADV7619 VSYNC output issue
Hi, I am using an ADV7619 to receive 4k HDMI signal. It's pixel bus is configured in 2x24-bit 4:4:4 SDR interleaved mode. The pixel bus is connected to an FPGA. I have an issue, that sometimes, when I...
View ArticleRe: AD22302 fourth generation i-MEMs : sensor axes orthogonal ?
Hi Didier, i-MEMS is an ADI proprietary process of integrating sensor and electronics on the same die. We have recently moved away from that for some of our products. So today our products are a mix...
View ArticleThread and Heap management functions in CCES?
Hi, I'm migrating a project from VisualDSP++ v5.0 to CCES v1.0.3 and there are a few functions that were used as part of VDK that I have been unable to find an equivalent to when using uCOS-III and...
View ArticleRe: ADXL 212 : Alignment error between X and Y : a mistake ?
Didier, The 0.01deg is typo sorry. The correct value is 0.1deg. regards,Venkat
View ArticleRe: ADRF6518 output noise, dBV/Hz or dBV/sqrt(Hz)
Hi Donald, Let me confirm this, but I'm pretty sure it is dBV/sqrt(Hz). This is in contrast to the dBm/Hz that people have traditionally worked in. This is because the dBV/sqrt(Hz) is basically just...
View ArticleRe: Parallel DAC with High Voltage Output (+18V)
Hi Mark, sorry I framed my last question wrong. I meant to say though I have power supply upto +18V from a LDO for the opamps but maximum available precision voltage reference available is +10V given...
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