ad 9736
hi all,am using ad9736 for my waveform generation project,s using kintex 7 fpga am sending a 14 bit dds data to dac in rsds io standard. i have used pin mode of operation..i used a 400 mhz clockfrom...
View ArticleRe: ADV7511 & AD9984A Basic Bringup
My setup is VGA -> AD9984A -> ADV7511 -> HDMI 1. There is good activity on the pixel bus2. HS and VS is coming from AD9984A, I do not have any DE signal.3. There is no activity at all on TMDS...
View ArticleAD9364 FB_CLK pin connection in LVDS mode
Hi All, I designed a custom board by using AD9364 and XC7A100(Artix-7) FPGA. In this board i followed the design same as AD-FMCOMMS2 like connected chip by using LVDS mode, connected data interface to...
View ArticleLooking for S parameter for HMC833lp6ge
Hello everyone I am looking for S parameter file of hittite hmc833lp6ge PLL+VCO thanks
View ArticleRe: 1701 (DAC?) noise
Hi, Glad to hear you found the noise source. Nowadays, scopes have switching power supplies which spray more noise than I'd like to see in test gear. So do laptop power adapters, which is why I run...
View ArticleRe: About Grop delay in SigmaStudioforsharc
Hi,JJoseph.Your understanding is correct.SigmaStudio for SHARC In addition to using standard EZ-Board there are other ways to achieve it?or ,Use SigmaStudio development ,There are ways to get rid of...
View ArticleRe: Is there a Support Team???....
Very well.It is clear now thatat least two people from the Support Team aremonitoringthisforum, evenon the weekend. I'm glad toknow that. Thank you
View ArticleRe: ADAU1452 External Delay issue
Hi John Please note that this SPI SRAM subject it is not documented. Here and there, they are references to it but it is everything very vague and obscure. When we try by ourselves, everything gets...
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Re: RS485 on BF518 EZ-Board
Hello, I was able to get the RS485 mode to work. However after I run my test application, the ehternet stops working. These are the pins I'm using: GPIO_PG1 (gpio 17) for CTS GPIO_PH0 (gpio 32) for...
View ArticleRe: Problem with ADV7619 consistently locking to an Apple IPAD.
Is it possible that you have a problematic iPad? Have you experimented with a different iPad? I tested your board with my iPad and did not see any issues. -Matt
View ArticleHMC928LP5E phase shifter solder implementation question
I'd like to make a phased array and using HMC928LP5E to control the excitation phase delay. The phase shifter will be soldered on a CPW. I noticed on the data sheet it says "vias under the device are...
View ArticleRe: AC701, fmcomms3, no-os interrupts? [Quick Question]
Can I remove all interrupt related signals and handling cores from the hdl reference design?
View ArticleRe: AC701/FCOMMS3 axi_ad9361 ip mods for custom no-os implementation
AdrianC So I got the DAC path working, I think. Now I'm working the ADC path. What is the functionality of the dsync output of the util_adc_pack core?Regards,Nick
View ArticleHMC6000
Hi,I'm looking for a data sheet for the HMC6000. Also, I would like to know if there is any evaluation board/platform available. Thanks,Joe
View ArticleOp-amp suggestion, current buffer
Hi, I am using HMC980 ABC(active bias controller) to bias some RF amplifiers.The Vgate output current sink/source capability of HMC980 is +-4 mA, and voltage swing is from -3.5 V to 0 V.Vgate output...
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Re: ADAU1452 External Delay issue
Hi Antonio, I took a look at your issue with the External (SPI RAM) Delay block. To test this feature, I used a ADAU145x board which used a a Microchip 23K256 RAM chip (see below) installed in the...
View ArticleRe: ADV7604 - Unstable hsync on output pixel port
Hi Please, could you provide the script file used in the application. I will try to look into this with a view to replicating the same issue you have reported on our platform and provide you feedback...
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Re: AD9361 Continous Receive
So I'm have an issue with the axi_dmac where Vivado 2014.3 is optimizing out eot for a fifo source and mm destination. I've been reading throught he synthesis schematics and saw the following:...
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