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Re: Does ADE7758 Samples have limitations?

Hi hmani, The SPI Mode depends in how the chip works in sending the data via SPI. You can see more here http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus#Mode_numbers . I'm using the SPI...

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Re: ADIS16480; 32-bit output data format

Okay i think i found the answer in the Datasheet. Sensitivity  x_ACCL_OUT and x_ACCL_LOW (32-bit)3.815 × 10 −9        g/LSB  So the Sensitivity is:  0.000125/(2^15) if i use out + low.0.00025 if i only...

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Re: How to download the firmware in to ADuC7060?

JTAG is unavailable if the part is powered down or in the kernel (i.e. serial) download mode. Apart from this, I can’t think of any other configuration that might be needed.The ADuC7060 evaluation...

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Re: How to download the firmware in to ADuC7060?

Thank you.!

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Re: Does the ADXL362 require a delay after soft reset?

Hi Lionel, You are correct. You need to add delay after soft reset since the part needs time to clear all of the user writable registers and force the device to re-load from the non-volatile memory....

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Re: Could not find supported CPU core on JTAG chain

LVDD is a 2.6V regulated output which is derived from AVDD, look at that rather than IOVDD for better information.

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Re: Connecting Multiple AD7794 Clock Pins

Hi George Vernon, Are you referring to the CLK pin or the SCLK pin. I suspect you are referring to the CLK pin since the devices work correctly when you lift the pin. Is each AD7794 using its own...

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Re: Could not find supported CPU core on JTAG chain

Thank you PatrickN and MMA.  I just solved the issue by keeping 1uF near to the 27 the pin (LVDD) along with 400nF which was little far.. Problem was with LVDD only. If I am correct I believe all the...

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Re: ADV7181C closed captions performance

Hi, 1) The ADV7181C can decode closed captioning on the incoming YPbPr data provided it is processed by the SDP core. VBI data cannot be decoded on YPbPr data processed through the CP core. For more...

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Re: DA9777 SPI

Hi Tom, Thank you for suggestions. but we already using this part in the board. So not possible to change the part now.I have another problem i am seeing a clock of 40MHz at DAC clock input pins and i...

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Re: error

Thans a lot. im trying to resolve what is the problem.If im using an external SDRAM also,should i modify the existing initialization file code?right now im using the dxe file for BF512 as specified in...

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Re: ADSP-21489 link error

Hi Ji, Having taken a closer look at your project, you can ignore my initial comments about the MEMORY{...} block - your LDF already has the DDR definitions. (Do a search for "MEMORY" - case sensitive...

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Re: Problem when Creating/Destroying Mutex/Semaphores in VDK Thread...

Thank you very much for the explanation James. I'd re-arranged my thread classes some time ago and all has been working fine.  I've attached a copy of the thread base class/s I've written. Deriving...

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Re: ~~@~!@~India vs Sri Lanka Live Streaming

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Suggest for implementing stack overflow

Hi, please suggest implementing stack overflow (with stack initialization) concept for ADuC7060/61.  I couln't find enough information in ADuC7060 manual. Appreciate your suggestions.!

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Watch Sri Lanka vs India Live Streaming 2nd Semi final

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Re: Watch Sri Lanka vs India Live Streaming 2nd Semi final

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What is the output of AD9525?

Hi all, Can anyone please tell me what is the output of AD9525?It is a square or sine wave?  Thank you.

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