Hello Gennady,
The AB in CD out Condition block (under Basic DSP / Logic) serve well as a comparator. In the circuit shown, when the RMS level ("A") exceeds the threshold ("B"), the block outputs the DC source at its "C" input. Otherwise it outputs its "D" input (zero).
The DC sources are arranged in binary (1,2,4,8...) sequence, so each comparator that's active outputs a designated bit position. The adder sums them up, then the Readback block reads this total value. The DC sources are in 24.0 format because the ADAU1701's Readback register truncates the four LSBs. To get this data from the Readback block into your uC, follow the directions at:
http://ez.analog.com/message/7669#7669
Best regards,
Bob