From page 30 of the AD9914 datasheet:
Because direct access to the DDS parameters occurs via the FTW, POW, and AMP registers, the IO_UPDATE pin (see Figure 41) adds another layer of flexibility. To accommodate this functionality, the AD9914 provides a register control bit, parallel port streaming enable (0x00[17]). When this bit is set to Logic 1, the parallel port operates without the need for an I/O update. When this bit is Logic 0, however, the device delivers the parallel port data to the appropriate registers (FTW, POW, AMP), but not to the DDS core. Data does not transfer to the DDS core until the user asserts the IO_UPDATE pin.