Hi, Alex,
There are tree more pins P0.1, P0.2, P0.3 which are affected by connecting emulator to JTAG.
When emulator is connected TO THE REGULAR JTAG pins, P0.1 becomes TDI, P0.2 becomes TDO, and P0.3 becomes TRST.
Overall, I saw ADuC7126 as a good replacement for ADuC7026, and it is, but these small "improvements" spoiled the picture.
Excuse my frustration, but this looks to me as wasting GPIO pins (and loosing potential customers).
Is there ANY reason WHY these pins are mimicking the REAL JTAG pins?
Is here a way to use them as GPIOs when processor in debugging mode?
Thanks,
Igor