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Re: question about ADV7125 mininal input clock pulse width @ 165MHz input freq

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and, we have got customer's input clock character

(1) mode 1:  input high pulse width 1.594ns, input low pulse width 2.697ns

(2) mode 2:  input high pulse width 2.730ns, input low pulse width 2.640ns

(3) mode 3:  input high pulse width 2.802ns, input low pulse width 2.727ns

 

do you think such specification is OK for 165MHz application?


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