Thanks for the very detailed description over your issue, I'm trying to cover the points you mentioned in the thread:
Now you have boot it successfully from UART, so suppose the DRAM part is working properly, we can focus on the SPI Flash.
First I would like to suggest you to check if the CONFIG_BFIN_BOOT_MODE is set to BFIN_BOOT_SPI_MASTER in file include/configs/bf537-stamp.h, coz I see by "sf probe 1" you can detect your own Flash correctly, this means it's working.
Second are you able to do "sf erase, sf write, sf read" etc after booting from UART? This could verify further if the Flash works correctly.
More points
1) when I do a 'make' with the SPI BOOT parameter enabled, which file do I need to tftp to the board? -- u-boot.ldr for both UART and SPI boot.
2)Is the flinfo command only for parallel flash? --yes
3)Is there a document that explains these parameters in detail? --
You only need to care about the FLASH chip specific parameters, and change it accord to the FLASH datasheet, here the detect info shows it's a 4K page, probably you need to change the sector size to 0x1000. please double check and try.
4)How do I calculate the number of blocks or sectors? I'm guessing here. --
They are for Parallel only yet still you can get it from the datasheet.