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Re: QPSK GENERATION (MATLAB HDLCODER)

hi DragosB, if u are there, can u pls test my data on your side . thanks a lot amruta

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Re: ADE7816 change of direction interrupt timing

Hi again hmani, I forgot to reply to this part: you should expect a settling time for the power computations to reflect the correct value. If you can monitor the RMS measurement after the reversal for...

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Re: ADV7625 OSD Character color change

Hi all,     The latest release code is X2.2.1Exp5,but still not solve the problem.Test with the Demo Board:usd QD882 as source into the RXA,and just connect TXA to TV.And  follow next to test:1.Power...

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Re: ADV7625 OSD Character color change

Hi all,     The latest release code is X2.2.1Exp5,but still not solve the problem.Test with the Demo Board:usd QD882 as source into the RXA,and just connect TXA to TV.And  follow next to test:1.Power...

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Re: Crashing CCES after setting user heap

SO have worked out thatint *thing = new (1) int is allowed butint *thing = new (heapName) is not

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Expectation when using new(heap_id) and heap_id not present in LDF

If I did    int *value = new(1) int and heap 1 did not exist in ldf then I would expect the compiler to return a NULL pointer or else the system would throw an exception.  Neither happens in following...

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Re: Expectation when using new(heap_id) and heap_id not present in LDF

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Can I use DC to input ADAS3023 for test?

Dear Sir:                                I try to used 3.3V DC(or GND) to input ADAS3023 EVB for test ADC function but it look like has many noise on ADAS3023 EVB GUI. I try to used 4Vp-p sine wave...

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Strage output AD9834

Hi,This is the first time that I use DDS, I am using AD9834 DDS and I got a strange output waveform see the image bellow, I was expecting a clean sine wave but we see that we have like a peak at the...

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Re: Strage output AD9834

dreamcatch002,   Remove C19 and put the 7.1k from pin 1 to ground with nothing else on pin 1, and remove R8 from IOUT to COMPSee what it looks like.  If that doesn't clear up the waveform, then also...

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SHARC 21065L

Hi all  I'm new around here so please forgive my ignorance ;-/ Just starting out with SHARC and on a tight budget I could not help myself to buy a few 21065L SHARC processors for dirt cheap, after...

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Build a pjt based on GitHub codes

HI~everyone.I work on AD9361(FMCOMMS2-EBZ) with my XILINX-V6 board. I follow the HDL Reference Design , go to the GitHub and download the hdl-master code package.My working platform is ISE 12.4 and I...

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Re: Best Blackfin uClinux development environment for Windows 7

Hi Dave, In fact we would always recommend customer to do Linux development in Linux environment, as a trade off they may install Linux host on a virtual machine in windows. And I don't think so far we...

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Re: ADSP-BF537 EZ-KIT Lite with ICE-100B and bfin-gdbproxy connection fails

I'm using toolchain win32 2010R1. I tried to figure out which firmware is on the ICE-100B with urJTAG, but is not possible to connect to the ICE-100B with urJTAG either. Thank you very much.

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Re: Booting an ADSP-21479 in spi slave mode

Hi CraigG, thank you for the reply. I got it running right now. The problem was, that i thought the loader utility would already pack the data  in LSB format because it also already does the right...

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ADV7611- Unused Pins

Hello, In my design i am receiving only RXAC+&-, RXA0+&-, RXA1+&- and RXA2+&- signals as input.what i do the unused pins of CEC, DDCA_SCL, DDCA_SDA, RXA_5V, HPA_A/INT2 and DE. I am not...

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ADAU1442 ASRC Implementation

Hello Everybody! My design involves an ASRC in which the Sigma DSP accepts S/PDIF input signals at different sampling rates and output as a S/PDIF signal as well. Say for example, incoming signals at...

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Re: ADV7612 / ADV7511 repeater SPDIF

HI Dani,1) RetVal = ADIAPI_RepTxSetAudioInputInterface(AUD_IF_AUTO, REP_AUD_TYPE_AUTO);This is used to configure the audio interface input and the packet type output of the TX device. If the audio is...

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Re: AD9681 PN9 and PN23

Dear Sir/Madam,For those who are interested i have included the AD9681 PN-9 parallel equations and PN-9 sequence. signal pn9_cs                   : std_logic_vector(13 downto 0) := "11" &...

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Re: ADV739x HW reset

Hi, Actually a clock input is required for 5mS before applying reset. Regards,Paul

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