Quantcast
Channel: EngineerZone: Message List
Browsing all 28044 articles
Browse latest View live

Re: Default setup of ADV7441A

Hello Dave, Thank you for making the time for my question.  Best regards,Kou

View Article


ADV7611 free run mode

Hello all, When we set HDMI_FRUN_EN=1 and change to Free run,Cycle of HS and VS signal become unstable.After that, Cycle become stable.As the result of our check, 80ms is needed by stability of VS...

View Article


AD9777 overall delay

Hi I am using the AD9777 in an existing design of a digital feedback controller, so actual input-to-output time delay is critical. What is this delay for the AD9777? (the datasheet only gives the...

View Article

Re: Signal latancy in the ADV7181C and ADV7392.

For he combination of AD and Intersil, the pixel clock rate is 13.5 MHz (Since Intersil's serializer needs 13.5MHz clock rate). If I convert this into time it is 0.074us. You mentioned the delay in CP...

View Article

Re: [ADV7511W] HDMI v1.4a, HDCP v1.3.

Hello, Thank you very much for your reply.Please fix the typo of the datasheet. Thank you.Best regards.

View Article


USBi now for $80!!

Down from $185 I think...Is this a holiday promotion or stock clearance before the new programmer based on XMOS is introduced?

View Article

Re: ADV7619 simultaneous operation

Hello, I ask the question of ADV7619  dividing two thread.I wrote the detail below thread.http://ez.analog.com/message/125762#125762 We use two ADV7619 and we ask if ADV7619 support  4K2K@60p.Regards,

View Article

Re: ADV7182 analog input level

Mr. GuenterThanks again for your answers on this. I didn't mean to discuss about what resistor divider network will get what gain level of the input signal. I post our schematic design here. The...

View Article


Re: How to use Inter Core Communication on bf609?

Hi, Aaronwu I cloned the new git repository but there isn't linux kernel source code in the adi-buildroot-code/linux/linux-kernel. I tryed to copy the linux-kernle sorce code to...

View Article


Re: How to use Inter Core Communication on bf609?

Please run "git submodule update --init" as it says in http://docs.blackfin.uclinux.org/doku.php?id=buildroot:build-system:build_a_target

View Article

Re: document of AD9257-65EBZ

Dear Kou-san, Thank you for your patience. I’ve attached the correct schematic. I’ll also have this posted to the website, but it will take a few days. The BOM and Gerber files should already be...

View Article

Image may be NSFW.
Clik here to view.

Re: AD9520 Mode0 problem with configuration

Hi Prakash BJ,Can you read the value that you have written for the output divider associated with the output that you are viewing?  For example output divider 0 (Reg 0x0190) should be written with a...

View Article

Image may be NSFW.
Clik here to view.

ADP1613 SEPIC issue

Hallo everybody! I have designed a SEPIC Converter with the following specifications: Vin: 3-8V, Vout: 5V, Iout: 0.3A  The design works fine, exept with an Input Voltage of exactly 4V! If the Input...

View Article


Image may be NSFW.
Clik here to view.

Re: AD9889 EDID Read Speed

I know it's an old part, we've been shipping these for quite some time.  That's why I'd like to be able to fix units in the field via a software update!   We already dialed the number of retries up to...

View Article

Visual Dsp++ 5.0 Blackfin Memory Viewer Issue

I am using Visual Dsp++ 5.0 Update 7.  The hardware is a ADZS-BF537-EZLITE.I noticed strange behavior with the memory viewer.  In looking at address 0x20040800 I see either 05 10 if I set the address...

View Article


Re: This is in reference to AD-FMCOMMS2-EBZ

I would recommend expanding your search to as many manufacturers as you can find. Contacting manufacturers directly may be helpful too since they often have custom designs not available on their...

View Article

Re: I/Q correction

The specification is stated at a frequency and I/Q correction is not uniform across the whole bandwidth.The performance will depend on the part configuration. It is recommended to measure performance...

View Article


Re: TDD LTE possibility for AD9361

ENSM control bits are avaiable in registers 0x013 - 0x015. Control bit D2 in register 0x015 turns on both synthesizers (typically used in FDD mode).

View Article

Re: ADuM3190/4190 Regulatory approvals

Hello Apickard, All certifications are complete.  We usually don't revise a data sheet when the cert is done because the come staggering in, and there have been no updates on this part, so the...

View Article

Re: Kernel panic - not syncing: VFS: Unable to mount root fs

You're using the ADI-2012R2-RC2 tools to build your vmImage, but I'm using the ADI-2013R1-RC1 tools. Do you think that makes a difference? Also, it looks like you compiled for BF609, not BF516, so I...

View Article
Browsing all 28044 articles
Browse latest View live


Latest Images

<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>