Re: How to reset AD779x sequencial channel reading
Hi, IN. Do I understand correctly that you are asking what needs to be done to start reading from VIN0 in the middle of reading another channel when sequencing from VIN0-VIN3? If so, you will need to...
View ArticleRe: DC Coupling ADL5565
Hope Holidays went well. Looking forward to a response, more information on distortion etc... operating with VICM and VOCM being different or a way to operate optimally when DC coupled... My guess is...
View ArticleRe: ADAU1761 Linux Device Driver for kernel v3.8
I have gotten around the firmware blob issue. Just pulled the dummy firmware blob from the ADI zynq_audio branch and configured the kernel to build the blob into the kernel image form the firmware...
View ArticleUsing ADIS device for rollover control device.
I am looking at using your product to make a semi-active suspension rollover control device for a heavy SUV. Was wanting some information on what your product produces to help accomplish that goal....
View ArticleRe: VisualDSP automation - Masking Interrupts
Hello, The issue is that we only read the target options from the registry at startup and then we use a local copy inside our library. Whenever you change the target options dialog and select OK we...
View ArticleADV7623 design collateral
Hello:I am looking for any design collateral that is available to aid in my design with the ADV7623. Is there a support wiki page? A reference design would be the ultimate but will take anything that...
View ArticleRe: AD5684 Power Management
Hi ddarko, The Vlogic pin of the AD5684 is the “Digital Power Supply” which powers up the digital block of your IC. It also sets on what level your digital communication line will be. The usual Vlogic...
View ArticleRe: ADV7623 design collateral
Have you seen the ADV7623 Design Support Files FAQ? http://ez.analog.com/docs/DOC-2573 It has some good information. -Matt
View ArticleRe: ADC7762 on board differentail amplifier
Hi Brad, Yes since these pins are connected to circuitry which is supplied by AVDD3.This is nominally a 5V supply, hence, it can take a 5V input signal. Thanks and Best Regards,Chris
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Re: Gain Error for high resolution ADCs
Hi, The gain error is defined on page 13 of the datasheet as “the deviation of the difference between the actual level of the last transition and the actual level of the first transition from the...
View ArticleADV212 compressed image seems shrouded in a frog
Hi all: My ADV212 can work,but the compressed image seems not that right, I compressed tripes and dynamic video,these figures seem like shrouded in a frog,the figures are attached below,is the...
View ArticleSHARC C/C++ Code Optimization
I'm starting to learn about how to best optimize C/C++ code to run on the SHARC architecture (21369 and 21469 processors), and I was hoping some of might have some suggestions as to how to go about...
View ArticleADG1406 in LFCSP_VQ package. It is analog mux. All channels except last on...
I am using ADG1406 in LFCSP_VQ package. It is analog mux. The first 15 channels are working fine but the last one with output on pin 1 in this package does not work. Signal does not propagate through....
View ArticleRe: GPIO on ADuC7060
Attached is a drawing. I have 4 of these circuits connection to P1.2, P1.3,P0.5, and P0.6.
View ArticleRe: ADV212 compressed image seems shrouded in a frog
HI: Thank you for your prompt reply,the compressed images are grayscale,so there's no chrome component at all,the output data i think is just the luma component, images are viewed using Kakadu,and...
View ArticleCan ADV7401 output 720p@30fps analog component with 8bit-4：2：2(DDR mode)?
Hello, I have questions about ADV7401. Question 1:Can ADV7401 output 720p@30fps analog component with 8bit-4：2：2(DDR mode)? Question 2:Please see attached file "pic19954.gif".This picture is from...
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parallel byte interface mode of AD7606
Dear Sir/Madam, We are going to use the parallel byte interface mode,and have two questions about DB[13:9]. Q1.There is the following description. P.15 of datasheet, "When PAR/SER/BYTE SEL = 1,...
View ArticleRe: ADV7612 with SONY DVD player BDP-S490 sync lose issue
Dear Sir, U-Boot 2010.06 (ADI-2010R1-RC2) (Jan 12 2011 - 15:53:34) CPU: ADSP bf524-0.2 (Detected Rev: 0.2) (spi flash boot) Thank you !! Best regardsSam
View ArticleAD9783 Settling time?
What is the AD9783 settling time and are the specification / measurement conditions? ThanksDave
View ArticleRe: AD9910 antibacklash pulse width control
Hi, Yes you are right, the PFD ANtibacklash PW control in the software corresponds to bits 11 and 12 of Address 0x02. Please do not stress yourself too much on this. You should not concern yourself...
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