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Re: bare metal GCC for BF707 / BF70x?

That is most unfortunate.  Thanks for the answer.

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ADF4351 PLL lock problem

HI, I wish to know that why PLL is not getting locked, Here i described my configuration and settings. Configuration: Required freq: 1091.2 MHz Reference freq: 26 MHzPFD Freq: 26...

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Re: How to verify digital loopback in AD9364?

Thank you Adrian, for the response. I used the correct adc_valid to trigger and also added the mentioned adc_data to the ILA. But it seems to be exactly same as the earlier one (from the dev_dbg_data)....

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How can we set BF561 to be Full-On Operating Mode

Hi, We are using ADSP-BF561SBBCZ-5A for data processing. We want BF561 to work under Full-On Operating Mode, and set PLL_CTL to be “0X2200”, but sometimes it failed (the processing speed is lower than...

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Re: ad-fmcomms1-ebz programming FPGA

Hi Shobi, "system_wrapper/system_i/axi_ad9643_dma_ddata[63:0] values signify???"That 64 bits going to be two consecutive adc sample pairs, concatenated like: I1, Q1, I0, Q0. We needed to merge two...

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Re: Impedance Measurement by Frequency Sweep

Hi Balaji, Thank you for your kind response. I have another query related to this. The RC sensor impedance varies from 10k to 30 ohm (for the frequency range) and therefore the RTIA I've calculated as...

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Re: FMCOMMS2+KC705 single tone reception problem

Here is a follow up on this issue and if you want to repeat the problem you can easily do so, as I describe here. I have implemented the original FPGA reference design for KC705 + FMCOMMS2 and followed...

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Re: Impedance Measurement by Frequency Sweep

Hi Shehzad, The ADuCM350 needs a minimum series resistance of 100 ohm to maintain IN-AMP stability.Hence,you can not measure 30 Ohms with ADuCM350. Please refer to the AFE Measurement range FAQ for...

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Re: FMCOMMS2+KC705 single tone reception problem

Hi Mike, I can't help with the first question, maybe one of my colleague. But for the second question: all the IDELAY primitive is accessible from software,  in the register map you can find two...

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Re: Problem with ADIS16448

I understand where you are coming from. It is hard to believe that this unit would have passed its ATE testing at our factory with this behavior, so either something has changed in the unit or it is...

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Re: AD9266 digital output level

Doug, It turns out that the oscilloscope probes that I had were not the correct ones (low bandwidth rating). The signals do go to the correct levels, and everything appears to be working as it should....

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Re: ADV7842 latency

Hi Dilraj, It's not specified but with the exception of the features that use memory (TBC and comb filter), it's on the order of a few pixel clocks-- much less than a line. I will check on the comb...

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Re: Ref Design KC705 AD9364 Role of DDR3 cntrl and DMA

Hi Vaibhav, 1. To understand the Tx and Rx chain, maybe you should start to read a little more about the device, the ad9361. After that you can try to understand the hdl part of the things, I would...

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Re: ADV7441A queries

Hi Ayusman, Not outside of commercial range.  140Mhz is the top end-- AD9984A (and ADV7842) go to 170Mhz but are commercial. Dave

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Re: Re: Re: AD5933 and AD5934 evaluation board software commands

Hi Sumit,http://www.analog.com/static/imported-files/application_notes/AN-1252.pdfHi Jialing,No idea about the error... in case helps, I can provide the initialization... which functions contains the...

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Re: probably hardware issue

Thanks for adviceI did check it and unfortunatelly this is not that case. RegardsSlawek

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Re: Disabling individual channel in AD9253 not working?

Hi Avnish, Thank you for contacting Engineer Zone regarding the AD9253. Can you please try setting the transfer register? So the commands will be  1. SPI_Write (0x05, 0x0E); Only send commands to...

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Re: SHARC Anomaly 1500005

Hi Paul, As this issue is being handled through private support channel. Let's continue the discussion there and post the outcome here, if appropriate. Regards,Jithul

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Re: High Speed DAC

By 256 steps, do you mean you want an 8-bit converter? Most of our converters have higher resolution that that, especially the ones that will sample fast enough to reach 1 GHz output tone. To reach...

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Re: VisualDSP++ 5.0: problems with union in Expressions window

Marco Lo Monaco wrote: I have the same issue on CCES, is it normal? Where can I track this bug progress?M.Hi Marco, What behaviour are you seeing in CCES, and what version are you using? I don't see an...

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