Re: Can the ZC706 board support dual link mode on the ad9144 (DAQ2 board)?
Please read the DAQ2 user guide also look at the schematics of ZC706 and DAQ2.
View ArticleRe: ADV7842-7511P：HDMI 1080P
Configuring for Port A and port B are the same except for selecting which port to work with. Register 68 00 selects the input port. You have this set up correctly. I would begin looking at some...
View ArticleADAU1701 EVOLUTION board not work in self-boot mode.
Hello everyone, I'm from Thailand, I've just started studying.ADAU1701 EVOLUTION board . Not work in self-boot mode.Questions?Pin. Wp voltage is 3.3v or not . While removing R23 for board out .But have...
View ArticleRe: AD9880 questions
Hi Mark, We no longer have the ability to support programming in the keys even if you have them actually. They would need to upgrade the design to ADV7842. Dave
View ArticleRe: code of the test pattern of AD7960?
Hi Dmitriy, The AD7960 generates an 18-bit pseudo random test pattern and to generate this pattern, you will need to power-up the AD7960 and set EN[3:0] = 0100. Then Initiate a conversion CNV± and run...
View ArticleRe: Can we make ADV7626 just pass the AV mute ON to sink without sending...
Hi Matt, Our Tx device is using ADV7626 in none-mux mode, our app controls ADV7626 to mute video on/off, so we do not want ADV7626 to black the video with the AVMUTE ON in GC packet received from its...
View ArticleRe: Video decoder for SD RGB with SOG & no CVBS
That's correct. Assuming the sync signal is only on Green, it should be connected to both ADC1 and ADC0 through separate input pins. -Matt
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Re: Can we make ADV7626 just pass the AV mute ON to sink without sending...
Hi Leon, Let me discuss with the software engineers. -Matt
View ArticleRe: AD9434 FPGA reference design for HSC-ADC-EVALC
Hi, I'm not sure what board you are referring to, is it one that you designed? The FPGA code for the AD9434 evaluation board can be found here: ftp://ftp.analog.com/pub/HSSP_SW/fpga The file name is...
View ArticleRe: Convolution Coding and viterbi Decoding
Hello Hina. The Viterbi decoder functions are built into VisualDSP and CCES. I am not sure which toolset you are using, but you can find the appropriate documentation in the associated compiler...
View ArticleRe: a AD9361 timing problem
Thank you for your reply!I used a IBUFDS to change the data_clk_n and data_clk_p to the CLK signal.Then connect the CLK signal to an ILA as the probe input to get the wave profile.The clk which the ILA...
View ArticleRe: AD9364 Tx monitor gain settings
Hi Oleg, In this commit I added the TX RSSI capability:https://github.com/analogdevicesinc/linux/commit/4ac14b2a481612b6bafaaf5e70e5b780cae5f5f0 Basic documentation can be found...
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AD8062 Sync Stripper
Dear Team, We are using AD8062 Op-Amp to strip the sync information from the Red and Blue component. We have designed the circuit as per the recommended in the datasheet. Please refer to the below fig....
View ArticleRe: a AD9361 timing problem
No- for what you have done, that result is expected.Your understanding of ILA and clock domains need a revisit. Connect that CLK from IBUFDS to a BUFG, then pass it to a DDR I/O - with 1/0 as...
View ArticleRe: ADAU1701: external frequency change detector
The reset ICs have internal debounce, and a 240ms reset anyway. Shows why I've gotten lazy about discretes, because the folks at ADI make parts that are too clever!
View ArticleRe: How to configure display timing via EDID
Another interesting test is after the PC has failed to get the correct edid, toggle the HPA line to force the PC to re-read the edid and see if it comes in clean. This thread shows how to do...
View ArticleCustom AD9361 board, no-os drivers, no rf output
Guys, I am working with a custom board that communicates with the AD9361 device using the no-os drivers in cmos mode. I understand that the no-os drivers were not designed to communicate in this mode,...
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1 equation covering fwd,rev AND breakdown of diode?
Apologies first - I can't find a "more appropriate" sub-forum for this question The diode curve can be modelled asI = Io(e^(eV/nKT) - 1) where n is 1 "in theory"...e=electron charge, K=Boltzmann's...
View ArticleRe: AD8318 overshoot problem
Is the output directly from the ad8318. If so the output has a negative slope and what you think is overshoot and settling time is actually the falling edge and is undershoot and recovery time. What is...
View ArticleRe: Multiplexer output does not match the input
Hi Pascal, Would you be able to remove the ADG758 from the system and test it on it's own? That would be useful as we would be able to see if the issue is being caused by the part or the other devices...
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